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Tokyo, January 13, 2026 – Canon has announced a world-first in semiconductor manufacturing with its innovative Inkjet-based Adaptive Planarization (IAP) technology, designed to dramatically improve wafer surface smoothness. This breakthrough, developed through Canon’s expertise in nanoimprint lithography, will be a game-changer in the production of advanced logic and memory devices.
Planarization, the process of smoothing out surface irregularities on semiconductor wafers, is critical for ensuring precise patterning and high-performance chips. Traditional methods, like spin coating and chemical mechanical polishing (CMP), involve complex multi-step processes that increase production time and cost. As semiconductor devices become smaller and more intricate, these conventional methods struggle to meet the growing demand for ultra-precise planarization.
Canon’s IAP technology leverages inkjet systems to precisely dispense light-curable material onto wafers, adapting to variations in the surface topography. A flat glass plate is then pressed onto the wafer to achieve an incredibly smooth surface with topographical irregularity reduced to just 5 nm. This high-precision process can level an entire 300 mm wafer in a single step, regardless of underlying circuit designs.
The new technology promises to reduce manufacturing complexity, improve efficiency, and lower costs—paving the way for the next generation of semiconductor devices. Canon plans to commercialize equipment incorporating IAP technology in 2027.
The company will present its findings at the SPIE Advanced Lithography and Patterning Conference in February 2026, where more details on the process and its initial results will be shared.
This revolutionary development positions Canon as a leader in addressing the increasingly complex challenges of semiconductor production, enabling the continued miniaturization of electronic devices and driving innovation in the industry.
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